- " It time-stamps tasks according to their priorities and begins working on the highest-priority tasks in parallel. "

- "Higher-priority tasks may engender their own lower-priority tasks, but Swarm slots those into its queue of tasks automatically."

- "each data item is labeled with the time stamp of the last task that updated it, so tasks with later time-stamps know they can read that data without bothering to determine who else is using it."

- "Swarm automatically backs out the results of the lower-priority tasks."

- "Finally, all the cores occasionally report the time stamps of the highest-priority tasks they're still executing. If a core has finished tasks that have earlier time stamps than any of those reported by its fellows, it knows it can write its results to memory without courting any conflicts."

AAAAARGH...why did I even bother doing exactly this stuff in software?

I want this chip! (good work guys!)

This sounds like it would optimise GPU's and 3D graphics processing even better than semi-sequential CPU workloads.
Simulating complex real world interactions would make this chip a great heart for a game station or a physics simulation engine like Monte Carlo method.

"Computer chips have stopped getting faster... chips' performance improvements have come from the addition of processing units known as cores."

The author set my teeth on edge with this statement. The balance of the article was interesting enough, but I couldn't help but wonder how accurate any of it is with such a clueless introduction.

It's false. Computer chips have not stopped getting faster.

Take nVidea's brand-new GTX 1080 and 1070 GPUs. These cards are about 60% faster than the last-gen GTX 980 and GTX 970 GPUs, and they do it with *fewer* CUDA cores. There's a lot of engineering that went into this speed improvement - it's only partly due to using a smaller die proces (16 nm).

Or take Intel's and Micron's 3-D X-Point memory chips, due to ship in limited numbers later this year or early next. This architecture will be much faster and considerably denser than NAND chips now on the market. Again, innovative engineering brought us faster chips.

There are a broad array of engineering approaches to producing faster chips. Smaller die sizes are still ahead, but the biggest advances may come from abandoning transistors in favor of voltage variance (3-D X-Point), spintronics, improved 3-D designs replacing flat silicon, photonics, and possibly quantum computing (inherently massively parallel), among other alternatives.

Speed advances have slowed as 2-D transistor-based designs have reached their maturity, but there are many, many design approaches still to be explored, and more speed advances are coming. Count on it.